DocumentCode :
1414204
Title :
I/O divided column redundancy scheme for high-speed DRAM with multiple I/Os
Author :
Lee, Jae-Goo ; Jun, Young-Hyun ; Lee, Chilgee ; Kong, Bai-Sun
Author_Institution :
Sungkyunkwan Univ., Suwon, South Korea
Volume :
36
Issue :
24
fYear :
2000
fDate :
11/23/2000 12:00:00 AM
Firstpage :
1996
Lastpage :
1997
Abstract :
A novel I/O divided column redundancy (IDCR) scheme that can improve the effectiveness of repair and minimise the overhead of the die area is presented. The IDCR scheme has greater flexibility than conventional schemes in multiple I/O DRAMs. Since an IDCR can share neighbouring redundant column lines (RCLs), the RCLs of neighbouring I/O blocks can be used to repair the defective column lines of a self-block. This work also shows that the IDCR scheme improves the data access speed of normal column lines or redundant column lines by reducing the data bus loading
Keywords :
DRAM chips; high-speed integrated circuits; integrated circuit reliability; redundancy; I/O divided column redundancy scheme; data bus loading reduction; dynamic RAM; high-speed DRAM; multiple I/Os; redundant column lines;
fLanguage :
English
Journal_Title :
Electronics Letters
Publisher :
iet
ISSN :
0013-5194
Type :
jour
DOI :
10.1049/el:20001413
Filename :
888279
Link To Document :
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