DocumentCode
1414580
Title
Byte synchronization system and method using an error-tolerant synchronization pattern for the PR IV channel
Author
Yasuda, T. ; Blaum, M. ; Tang, D.D.
Author_Institution
IBM Japan Yasu, Shiga, Japan
Volume
34
Issue
4
fYear
1998
fDate
7/1/1998 12:00:00 AM
Firstpage
1922
Lastpage
1924
Abstract
The probability of byte synchronization failure for a Viterbi detector in a partial-response class IV (PR IV) system with an additive white Gaussian noise (AWGN) is analysed. The error rate of the Viterbi detector is computed as a function of the combination of two critical incorrect samples, which is then related to the signal-to-noise ratio (SNR) of the samples. New error-tolerant byte-synchronization patterns (ETBSP) and detection circuitry for the partial-response maximum-likelihood (PRML) channel are introduced. The length of the new patterns is 1/3 shorter than the conventional ones, and the probability of failure is four orders of magnitude lower. The complexity of the circuitry is halved by introducing a new vector subtracter and a new offset adder
Keywords
Gaussian noise; Viterbi detection; error detection; failure analysis; magnetic recording noise; maximum likelihood detection; partial response channels; synchronisation; white noise; PR IV channel; Viterbi detector; additive white Gaussian noise; byte synchronization failure; byte synchronization system; critical incorrect samples; detection circuitry; error rate; error-tolerant byte-synchronization patterns; error-tolerant synchronization pattern; magnetic storage; offset adder; partial-response class IV system; partial-response maximum-likelihood channel; probability; signal-to-noise ratio; vector subtracter; AWGN; Adders; Additive white noise; Circuits; Detectors; Error analysis; Failure analysis; Maximum likelihood detection; Signal to noise ratio; Viterbi algorithm;
fLanguage
English
Journal_Title
Magnetics, IEEE Transactions on
Publisher
ieee
ISSN
0018-9464
Type
jour
DOI
10.1109/20.706744
Filename
706744
Link To Document