DocumentCode :
1415299
Title :
Ternary arithmetic unit
Author :
Halpern, Israel ; Yoeli, Michael
Author_Institution :
Technion-Israel Institute of Technology, Faculty of Electrical Engineering, Haifa, Israel
Volume :
115
Issue :
10
fYear :
1968
fDate :
10/1/1968 12:00:00 AM
Firstpage :
1385
Lastpage :
1388
Abstract :
A ternary arithmetic unit is proposed which is based on the ternary symmetric number representation using digit +1, 0, ¿1. The advantages of this number representation are given in detail. Present-day familiar diode-transistor circuitry is applied. Detailed circuit realisations and logic diagrams of ternary gates, a 3-stable element, and a ternary full adder are developed.
Keywords :
logic circuits;
fLanguage :
English
Journal_Title :
Electrical Engineers, Proceedings of the Institution of
Publisher :
iet
ISSN :
0020-3270
Type :
jour
DOI :
10.1049/piee.1968.0246
Filename :
5248260
Link To Document :
بازگشت