DocumentCode :
1415461
Title :
Analysis of delays in converting from a redundant representation
Author :
Walter, C.D.
Author_Institution :
Dept. of Comput., Univ. of Manchester Inst. of Sci. & Technol., UK
Volume :
144
Issue :
4
fYear :
1997
fDate :
7/1/1997 12:00:00 AM
Firstpage :
219
Lastpage :
221
Abstract :
The use of a redundant number system allows many arithmetic operations to process digits sequentially, most significant digit first. Final conversion back to a standard binary representation can require time to propagate any carries. This paper analyses and reports on the delays encountered when this is done by an online algorithm, giving a good upper bound on the expected delay. The delay is approximately log,k for the kth digit in a representation with base r
Keywords :
computational complexity; delays; redundant number systems; arithmetic operations; binary representation; delays; kth digit; online algorithm; redundant number system; redundant representation; upper bound;
fLanguage :
English
Journal_Title :
Computers and Digital Techniques, IEE Proceedings -
Publisher :
iet
ISSN :
1350-2387
Type :
jour
DOI :
10.1049/ip-cdt:19971284
Filename :
612279
Link To Document :
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