DocumentCode
1415603
Title
CMOS edge-triggered flip-flop using one latch
Author
Wu, X. ; Wei, J.
Author_Institution
Dept. of Electron. Eng., Hangzhou Univ., China
Volume
34
Issue
16
fYear
1998
fDate
8/6/1998 12:00:00 AM
Firstpage
1581
Lastpage
1582
Abstract
The authors use the narrow pulse produced by the race-hazard of the clock signal to control the latch, so as to meet the `nontransparent´ demand. Based on this principle, a novel CMOS edge-triggered flip-flop using one latch is proposed which has a simpler construction and lower power dissipation than previous flip-flops
Keywords
CMOS logic circuits; flip-flops; CMOS edge-triggered flip-flop; clock signal; latch; nontransparent demand; power dissipation; race hazard;
fLanguage
English
Journal_Title
Electronics Letters
Publisher
iet
ISSN
0013-5194
Type
jour
DOI
10.1049/el:19981095
Filename
707151
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