DocumentCode
1416273
Title
A high-throughput memory-based VLC decoder with codeword boundary prediction
Author
Shieh, Bai-Jue ; Lee, Yew-San ; Chen-Yi Lee
Author_Institution
Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan
Volume
10
Issue
8
fYear
2000
fDate
12/1/2000 12:00:00 AM
Firstpage
1514
Lastpage
1521
Abstract
In this paper, we present a high-throughput memory-based VLC decoder with codeword boundary prediction. The required information for prediction is added to the proposed branch models. Based on an efficient scheme, these branch models and the Huffman tree structure are mapped onto memory modules. Taking the prediction information, the decompression scheme can determine the codeword length before the decoding procedure is completed. Therefore, a parallel-processor architecture can be applied to the VLC decoder to enhance the system performance. With a clock rate of 100 MHz, a dual-processor decoding process can achieve decompression rate up to 72.5 Msymbols/s on the average. Consequently, the proposed VLC decompression scheme meets the requirements of current and advanced multimedia applications
Keywords
Huffman codes; digital signal processing chips; parallel architectures; tree codes; variable length codes; video codecs; 100 MHz; Huffman tree structure; branch models; codeword boundary prediction; decompression rate; decompression scheme; dual-processor decoding process; high-throughput memory-based VLC decoder; memory modules; multimedia; parallel-processor architecture; prediction information; system performance; Clocks; Huffman coding; Iterative decoding; Pipelines; Predictive models; Streaming media; System performance; Throughput; Transform coding; Tree data structures;
fLanguage
English
Journal_Title
Circuits and Systems for Video Technology, IEEE Transactions on
Publisher
ieee
ISSN
1051-8215
Type
jour
DOI
10.1109/76.889063
Filename
889063
Link To Document