Title :
A Dual-Shader 3-D Graphics Processor With Fast 4-D Vector Inner Product Units and Power-Aware Texture Cache
Author :
Yoon, Jae-Sung ; Yu, Chang-Hyo ; Kim, Donghyun ; Kim, Lee-Sup
Author_Institution :
Dept. of Electr. Eng. & Comput. Sci., Korea Adv. Inst. of Sci. & Technol. (KAIST), Daejeon, South Korea
fDate :
4/1/2011 12:00:00 AM
Abstract :
This paper presents a fully programmable 3-D graphics processor using unified shaders for mobile environment. In the system level, we adopted dual-core, dual-issue VLIW, and multithreading methods to utilize instruction, data, and task level parallelism in the graphics applications. In the shader core level, a novel IEEE-754 compliant 4-D vector inner product arithmetic unit and a configurable texture cache are proposed. Using these methods, the proposed processor achieves 143 Mvertices/s and 2.3 Gtexels/s consuming the power of 367 mW. The evaluation shows significant performance and power-delay product benefits. For real graphics applications, test results indicate 2.07 times improvement in performance and 34% reduction in power-delay product compared to previous mobile 3-D graphics processors. The proposed 3-D graphics processor is implemented in 4.5× 4.52 mm using 0.18 μm CMOS technology.
Keywords :
CMOS digital integrated circuits; cache storage; computer graphics; coprocessors; instruction sets; multi-threading; CMOS technology; IEEE-754 compliant 4D vector inner product arithmetic unit; dual-core dual-issue VLIW; dual-shader 3D graphics processor; fast 4D vector inner product units; graphic applications; mobile 3D graphics processors; mobile environment; multithreading methods; power 367 mW; power-aware texture cache; power-delay product; programmable 3-D graphics processor; shader core level; size 0.18 mum; task level parallelism; unified shaders; 3-D graphics; VLIW; configurable cache; unified shader; vector inner product;
Journal_Title :
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
DOI :
10.1109/TVLSI.2009.2038922