DocumentCode
1417118
Title
An Effective Correction Methodology for Interference of Stress-Induced Leakage Current in TDDB Evaluation of High-
Dielectrics
Author
Wu, Ernest Y.
Author_Institution
Microelectron. Div., Semicond. R&D Center, IBM, Essex Junction, VT, USA
Volume
33
Issue
2
fYear
2012
Firstpage
191
Lastpage
193
Abstract
A simple and effective correction methodology for interference of stress-induced leakage current (SILC) in time-dependent-dielectric-breakdown (TDDB) evaluation of high-k dielectrics is reported. Unlike the violation of weakest link failure property found in conventional TDDB evaluation with SILC interference, we have demonstrated that time-to-failure distributions obtained with this new methodology restores this universal property. Excellent results in terms of improved time to failure and Weibull slope were obtained, thus providing a realistic TDDB projection. The algorithm of this methodology is easy to implement and can be used in daily TDDB evaluation.
Keywords
dielectric materials; electric breakdown; leakage currents; TDDB evaluation; Weibull slope; effective correction methodology; high-k dielectrics; stress-induced leakage current; time-dependent-dielectric-breakdown evaluation; time-to-failure distribution; Current measurement; Dielectrics; High K dielectric materials; Leakage current; Logic gates; Stress; Transient analysis; Breakdown; high-$k$ reliability; stress-induced leakage current (SILC); time-dependent dielectric breakdown (TDDB);
fLanguage
English
Journal_Title
Electron Device Letters, IEEE
Publisher
ieee
ISSN
0741-3106
Type
jour
DOI
10.1109/LED.2011.2177957
Filename
6125978
Link To Document