DocumentCode :
1417265
Title :
5-GHz CMOS radio transceiver front-end chipset
Author :
Liu, Ting-Ping ; Westerwick, Eric
Author_Institution :
Lucent Technol. Bell Labs., Holmdel, NJ, USA
Volume :
35
Issue :
12
fYear :
2000
Firstpage :
1927
Lastpage :
1933
Abstract :
Incorporating the direct-conversion architecture, a 5-GHz band radio transceiver front end chipset for wireless LAN applications is implemented in a 0.25-/spl mu/m CMOS technology. The 4-mm/sup 2/ 5.25-GHz receiver IC contains a low noise amplifier with 2.5-dB noise figure (NF) and 16-dB power gain, a receive mixer with 12.0 dB single sideband NF, 13.7-dB voltage gain, and -5 dBm input 1-dB compression point. The 2.7-mm/sup 2/ transmitter IC achieves an output 1-dB compression of -2.5 dBm at 5.7 GHz with 33.4-dB (image) sideband rejection by using an integrated quadrature voltage-controlled oscillator. Operating from a 3-V supply, the power consumptions for the receiver and transmitter are 114 and 120 mW, respectively.
Keywords :
CMOS analogue integrated circuits; field effect MMIC; radio receivers; radio transmitters; transceivers; wireless LAN; 0.25 micron; 114 mW; 120 mW; 13.7 dB; 2.5 dB; 3 V; 5 to 5.7 GHz; CMOS radio transceiver chipset; WLAN applications; direct-conversion architecture; integrated quadrature VCO; low noise amplifier; quadrature voltage-controlled oscillator; radio transceiver front-end chipset; receive mixer; receiver IC; transmitter IC; wireless LAN applications; CMOS technology; Image coding; Integrated circuit noise; Low-noise amplifiers; Noise figure; Noise measurement; Radio transceivers; Radio transmitters; Receivers; Wireless LAN;
fLanguage :
English
Journal_Title :
Solid-State Circuits, IEEE Journal of
Publisher :
ieee
ISSN :
0018-9200
Type :
jour
DOI :
10.1109/4.890306
Filename :
890306
Link To Document :
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