DocumentCode
1417298
Title
A CMOS HDSL2 analog front-end
Author
Gattani, Amit ; Cline, David W. ; Hurst, Paul J. ; Mosinskis, Paul M.
Author_Institution
Level One Commun., New Jersey Design Center, Morganville, NJ, USA
Volume
35
Issue
12
fYear
2000
Firstpage
1964
Lastpage
1975
Abstract
A 5-V 0.5-/spl mu/m CMOS analog front-end (AFE) IC for HDSL2 incorporates transmit digital-to-analog converter (DAC), transmit filters, output buffer, receive AGC, and receive ADC. The AFE consumes 525 mW and provides better than 82-dB signal-to-noise-and-distortion ratio (SNDR) in both transmit and receive paths. It supports variable data rates from 64 kb/s up to 2.32 Mb/s, and enables an HDSL2 system to achieve better than 14 kft of noise-free reach (on 26-gauge wire) at 1.544 Mb/s.
Keywords
CMOS analogue integrated circuits; automatic gain control; digital subscriber lines; digital-analogue conversion; switched capacitor filters; 0.5 micron; 14000 feet; 5 V; 525 mW; 64 kbit/s to 2.32 Mbit/s; CMOS; HDSL2 analog front-end; noise-free reach; output buffer; receive AGC; signal-to-noise-and-distortion ratio; transmit digital-to-analog converter; transmit filters; variable data rates; ANSI standards; Analog integrated circuits; CMOS analog integrated circuits; Crosstalk; DSL; Digital filters; Matched filters; North America; Pulse modulation; Robustness;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/4.890311
Filename
890311
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