A fuzzy RISC processor

Author

Salapura, Valentina

Author_Institution

IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA

Volume

8

Issue

6

fYear

2000

fDate

12/1/2000 12:00:00 AM

Firstpage

781

Lastpage

790

Abstract

We describe application-specific extensions for fuzzy processing to a general purpose processor. The application-specific instruction set extensions were defined and evaluated using hardware/software codesign techniques. Based on this approach, we have extended the MIPS instruction set architecture with only a few new instructions to significantly speed up fuzzy computation with no increase of the processor cycle time and with only minor increase in chip area. The processor is implemented using a reconfigurable processor core which was designed as a starting point for application-specific processor designs to be used in embedded applications. Performance is presented for three representative applications of varying complexity

Keywords

fuzzy set theory; hardware-software codesign; parallel architectures; reconfigurable architectures; reduced instruction set computing; MIPS; RISC; application-specific instruction set; fuzzy processor; hardware/software codesign; reconfigurable processor; subword parallelism; Application software; Application specific processors; Computer aided instruction; Computer architecture; Fuzzy control; Fuzzy sets; Fuzzy systems; Hardware; Parallel processing; Reduced instruction set computing;

fLanguage

English

Journal_Title

Fuzzy Systems, IEEE Transactions on

Publisher

ieee

ISSN

1063-6706

Type

jour

DOI

10.1109/91.890338

Filename

890338