Title :
A 3-terminal model for diffused and ion-implanted resistors
Author :
Booth, Richard V H ; McAndrew, Colin C.
Author_Institution :
AT&T Bell Labs., Allentown, PA, USA
fDate :
5/1/1997 12:00:00 AM
Abstract :
In this paper, we present a new, physically based 3-terminal model for diffused and ion-implanted resistors. The model accounts for the effects of geometry, temperature, and bias, and includes parasitic p-n junction diodes. The junction depletion capacitances are distributed to model high-frequency behavior accurately
Keywords :
CMOS integrated circuits; capacitance; ion implantation; resistors; semiconductor device models; CMOS technology; bias effects; diffused ion-implanted resistors; distributed behavior; geometry effects; high-frequency behavior; integrated resistors; junction depletion capacitances; parasitic p-n junction diodes; physically based 3-terminal model; temperature effects; Diodes; Geometry; Immune system; Land surface temperature; P-n junctions; Parasitic capacitance; Resistors; Solid modeling; Temperature dependence; Voltage;
Journal_Title :
Electron Devices, IEEE Transactions on
