DocumentCode
1418028
Title
An optimal test compression procedure for combinational circuits
Author
Hochbaum, Dorit S.
Author_Institution
Dept. of Ind. Eng. & Oper. Res., California Univ., Berkeley, CA, USA
Volume
15
Issue
10
fYear
1996
fDate
10/1/1996 12:00:00 AM
Firstpage
1294
Lastpage
1299
Abstract
The problem of optimal test compression is to derive, from a given set of test vectors, a smallest possible subset of test vectors that still test for the same collection of faults. This achieves optimal compression and largest reduction possible in test time relative to the original set of test vectors. We present a new approach based on the modeling of the problem as the Set Cover problem. Additionally, the approach implies an ordering of the faults according to the difficulty of covering them with the given set of test vectors. As such it can be used to facilitate the finding of a solution to the ultimate smallest test-set-the compression of the set of all possible test vectors. Our approach highlights the potential usefulness of integer programming techniques in testing and design
Keywords
automatic testing; combinational circuits; integer programming; integrated circuit testing; logic testing; quality control; combinational circuits; fault ordering; integer programming techniques; set cover problem; test compression procedure; test vectors; Automatic test pattern generation; Automatic testing; Circuit faults; Circuit testing; Combinational circuits; Compaction; Computational complexity; Linear programming; Quality control; Test pattern generators;
fLanguage
English
Journal_Title
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher
ieee
ISSN
0278-0070
Type
jour
DOI
10.1109/43.541449
Filename
541449
Link To Document