Title :
A 11μW 250 Hz BW two-step incremental ADC with 100 dB DR and 91 dB SNDR for integrated sensor interfaces
Author :
Chia-hung Chen ; Yi Zhang ; Tao He ; Chiang, Patrick Yin ; Temes, Gabor C.
Author_Institution :
Sch. of EECS, Oregon State Univ., Corvallis, OR, USA
Abstract :
A two-step incremental ADC (IADC) is proposed for low-bandwidth, micro-power sensor interface circuits. This architecture extends the order of a conventional IADC from N to (2N-1) by using a two-step operation, while requiring only the circuitry of an Nth-order IADC. The implemented third-order IADC achieves a measured dynamic range of 99.8 dB and an SNDR of 91 dB for a maximum input 2.2 VPP and 250 Hz bandwidth. Fabricated in 65 nm CMOS, the IADC´s core area is 0.2 mm2, and consumes only 10.7 μW. The FoMs are 0.76 pJ/conversion-step and 173.5 dB, both among the best reported results.
Keywords :
CMOS digital integrated circuits; analogue-digital conversion; low-power electronics; switched capacitor networks; CMOS technology; IADC; bandwidth 250 Hz; integrated sensor interfaces; micropower sensor interface circuits; power 10.7 muW; power 11 muW; size 65 nm; two-step incremental analog-to-digital converters; Bandwidth; Clocks; Digital filters; Dynamic range; Modulation; Switched capacitor circuits; Timing; Analog-to-digital Converter (ADC); chopper stabilization; decimation filter; delta sigma (ΔΣ); extended-counting; incremental data converter; micro-power; oversampling; sensor interface;
Conference_Titel :
Custom Integrated Circuits Conference (CICC), 2014 IEEE Proceedings of the
Conference_Location :
San Jose, CA
DOI :
10.1109/CICC.2014.6945988
