A 9-bit 215-MS/s folding-flash time-to-digital converter based on redundant remainder number system

A novel folding-flash time-to-digital converter (TDC) based on the remainder number system (RNS) is presented. In this architecture, fine quantization of an input time interval is performed directly with two free-running ring oscillators (RO) without additional circuitry to record the coarse bits. The technique is useful to obtain a high resolution with much fewer delay elements while retaining the same conversion speed compared to the flash counterpart employing delay chains. A proof-of-concept prototype RNS TDC, consisting of 84 delay elements, achieves a resolution of 8.94 bits, or 490 quantization levels. The prototype was fabricated in a 45-nm CMOS process and measured a sample rate of 215 MS/s and an LSB size of 9.4 ps. Without trimming or calibration, the measured differential nonlinearity (DNL) and integral nonlinearity (INL) of the RNS TDC are +0.53/-0.57 and +1.1/-1.1 LSBs, respectively.