Title :
A 16kB tile-able SRAM macro prototype for an operating window of 4.8GHz at 1.12V VDD to 10 MHz at 0.5V in a 28-nm HKMG CMOS
Author :
Ming-Zhang Kuo ; Hsieh, Henry ; Sang Dhong ; Ping-Lin Yang ; Cheng-Chung Lin ; Tseng, Ricky ; Kevin Huang ; Min-Jer Wang ; Wei Hwang
Author_Institution :
Taiwan Semicond. Manuf. Co., Hsinchu, Taiwan
Abstract :
This paper describes a tile-able 16-kByte 6-T SRAM macro in a High-K Metal-Gate (HKMG) 28-nm bulk technology with an operating window from 4.8 GHz at 1.12 V VDD down to 10 MHz at 0.5V, meeting almost all of the Dynamic Voltage Frequency Scaling (DVFS) requirements of Level-1 (L1) caches of a digital microprocessor SOC. It uses an unmodified technology-supported 0.156um2 high-current (HC) SRAM cell. Innovative and carefully optimized circuit solutions provide the wide operating range measured in hardware. We also discuss two circuit improvements, a cross-coupled PMOS-pair for each bitline-pair with mux readout and an independently-controlled precharge-and-write driver (ICPW), which gives a wider DVFS operating window with reduced sensitivities to Process-Voltage-Temperature (PVT) variations. Improved SRAM macros with new circuits have been designed and laid out and their performance and area verified in simulation.
Keywords :
CMOS digital integrated circuits; SRAM chips; circuit optimisation; integrated circuit design; system-on-chip; DVFS operating window; DVFS requirements; HC SRAM cell; HKMG CMOS; HKMG bulk technology; ICPW; PVT variations; SOC; bitline-pair; cross-coupled PMOS-pair; digital microprocessor; dynamic voltage frequency scaling requirements; frequency 10 MHz; frequency 4.8 GHz; high-K metal-gate bulk technology; high-current SRAM cell; independently-controlled precharge-and-write driver; process-voltage-temperature variations; size 0.156 mum; size 28 nm; tile-able SRAM macroprototype; voltage 0.5 V; voltage 1.12 V; Arrays; CMOS integrated circuits; CMOS technology; IP networks; Latches; Noise; Random access memory; Cross-coupled PMOS-pair; DVFS; SRAM; independently controlled precharge-and-write driver (ICPW);
Conference_Titel :
Custom Integrated Circuits Conference (CICC), 2014 IEEE Proceedings of the
Conference_Location :
San Jose, CA
DOI :
10.1109/CICC.2014.6946030
