DocumentCode :
142033
Title :
A 75mW 50Gbps SerDes transmitter with automatic serializing time window search in 65nm CMOS technology
Author :
Ke Huang ; Ziqiang Wang ; Xuqiang Zheng ; Chun Zhang ; Zhihua Wang
Author_Institution :
Tsinghua Nat. Lab. for Inf. Sci. & Technol., Tsinghua Univ., Beijing, China
fYear :
2014
fDate :
15-17 Sept. 2014
Firstpage :
1
Lastpage :
4
Abstract :
This paper presents a 50Gbps half rate SerDes transmitter with automatic serializing time window search. By implementing a serializing time window search loop, the serializing timing is guaranteed and circuits running at highest speed such as latches for retiming and clock tree buffers for delay matching are eliminated. Fabricated in 65nm CMOS technology, the transmitter running at 50Gbps consumes only 75mW power under 1.2V power supply. The total jitter of 50Gbps eye diagram is 9.8ps for 1e-12 BER.
Keywords :
CMOS analogue integrated circuits; buffer circuits; clocks; error statistics; flip-flops; radio transmitters; BER; CMOS technology; SerDes transmitter; automatic serializing time window search; bit rate 50 Gbit/s; clock tree buffers; delay matching; latches; power 75 mW; search loop; size 65 nm; voltage 1.2 V; CMOS integrated circuits; Clocks; Delays; Jitter; Latches; Transmitters; SerDes; low power; serializing time window search; transmitter;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Custom Integrated Circuits Conference (CICC), 2014 IEEE Proceedings of the
Conference_Location :
San Jose, CA
Type :
conf
DOI :
10.1109/CICC.2014.6946101
Filename :
6946101
Link To Document :
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