• DocumentCode
    1420829
  • Title

    Influence of Channel and Gate Engineering on the Analog and RF Performance of DG MOSFETs

  • Author

    Mohankumar, N. ; Syamal, Binit ; Sarkar, Chandan Kumar

  • Author_Institution
    Dept. of Electron. & Telecommun. Eng., Jadavpur Univ., Kolkata, India
  • Volume
    57
  • Issue
    4
  • fYear
    2010
  • fDate
    4/1/2010 12:00:00 AM
  • Firstpage
    820
  • Lastpage
    826
  • Abstract
    The design of analog and RF circuits in CMOS technology has become increasingly more difficult as device modeling faces new challenges in the deep-submicrometer regime and emerging circuit applications. In this paper, we investigate the influence of both channel and gate engineering on the analog and RF performances of double-gate (DG) MOSFETs for system-on-chip applications. The gate engineering technique used here is the dual-metal gate technology, and the channel engineering technique is the conventional halo doping process. For analog applications, importance is given to the subthreshold regime as CMOS circuits operated in this regime are very much attractive for ultralow-power high-gain performances. Gate- and channel-engineered devices show an increase of gain by 45% and 35%, respectively, compared with the single-metal DG MOSFET. The gate-engineered device shows an improvement of 21.6% and 20% in the case of fT and fMAX values, whereas the channel-engineered device exhibits a reduction of fT by 2.7% with nearly equal fMAX.
  • Keywords
    CMOS analogue integrated circuits; MOSFET; doping; radiofrequency integrated circuits; system-on-chip; CMOS circuits; RF circuits; analog circuits; channel-engineered devices; conventional halo doping process; dual-metal gate technology; gate-engineered devices; single-metal double-gate MOSFET; subthreshold regime; system-on-chip applications; ultralow-power high-gain performances; Analog circuits; CMOS analog integrated circuits; CMOS digital integrated circuits; CMOS technology; Councils; MOSFETs; Radio frequency; Scalability; Semiconductor device modeling; System-on-a-chip; Carrier transport efficiency; dual-metal double gate (DM-DG); halo-implanted DG (HALO-DG); radio-frequency (RF) applications; system-on-chip (SoC);
  • fLanguage
    English
  • Journal_Title
    Electron Devices, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9383
  • Type

    jour

  • DOI
    10.1109/TED.2010.2040662
  • Filename
    5416303