Inherently linear time symmetric pulse width modulation

This paper proposes a new category of pulse-width-modulation (PWM), time-symmetric PWM (TSPWM). This TSPWM technique removes the intrinsic harmonic distortion from PWM without using calibration or adding circuit complexity. To demonstrate the proposed technique, a PWM modulator using TSPWM is implemented as the voltage-to-time interface that modulates the voltage input to binary pulses at modulation frequency of 25MHz. It is followed by a first order noise-shaped switched-ring-oscillator (SRO) time-to-digital converter (TDC) quantizing the pulse train at sample rate of 400MHz. Built in 0.18μm, the prototype chip shows a SFDR improvement of 24dB on the TDC output when TSPWM is used.