Improved power supply noise control for pseudo functional test

Differences in power supply noise (PSN) between functional and structural delay testing can lead to differences in chip operating frequencies of 30% or more. High delay correlation between structural and functional test requires the paths under test to experience the worst-case realistic PSN. We present a PSN control method for pseudo functional test that combines random flipping and background patterns to efficiently fill don´t care bits. Dynamic bit weighting permits intelligent selection of background patterns. Experimental results on benchmark circuits achieve worst-case realistic PSN in significantly less CPU time than prior techniques.