A VCO-based ADC employing a multi-phase noise-shaping beat frequency quantizer for direct sampling of Sub-1mV input signals

Author

Bongjin Kim ; Kundu, Sandipan ; Ko, Sungyeon ; Kim, Chul Han

Author_Institution

Univ. of Minnesota, Minneapolis, MN, USA

fYear

2014

fDate

15-17 Sept. 2014

Firstpage

1

Lastpage

4

Abstract

A VCO-based ADC featuring a multi-phase beat frequency based quantization scheme with first order noise shaping is demonstrated in a 65nm CMOS process. The proposed ADC is unique in that it can achieve high resolution (e.g. 6-7 ENOB) for signals with extremely small amplitudes (e.g. <;1mV). This allows us to remove or simplify the pre-conditioning amplifiers, reducing power consumption as well as the overall system complexity. The proposed ADC achieves 43dB SNDR for a 1mV input signal while achieving a 10kHz bandwidth and 300kHz sample rate, and consumes 36μW at a 1.2V supply.

Keywords

CMOS integrated circuits; amplifiers; analogue-digital conversion; power consumption; quantisation (signal); voltage-controlled oscillators; ADC; CMOS; VCO; bandwidth 10 kHz; first order noise shaping; frequency 300 kHz; multi-phase beat frequency based quantization scheme; multi-phase noise-shaping beat frequency quantizer; power 36 muW; power consumption; pre-conditioning amplifiers; size 65 nm; voltage 1 mV; voltage 1.2 V; Clocks; Frequency measurement; Noise shaping; Quantization (signal); Semiconductor device measurement; Signal resolution; Voltage-controlled oscillators;

fLanguage

English

Publisher

ieee

Conference_Titel

Custom Integrated Circuits Conference (CICC), 2014 IEEE Proceedings of the

Conference_Location

San Jose, CA

Type

conf

DOI

10.1109/CICC.2014.6946126

Filename

6946126