A bidirectional neural interface SoC with an integrated spike recorder, microstimulator, and low-power processor for real-time stimulus artifact rejection

This paper presents a neural interface system-on-chip (SoC), featuring combined spike recording, electrical microstimulation and real-time stimulus artifact rejection (SAR) for bidirectional interfacing with the central nervous system. Fabricated in AMS 0.35μm 2P/4M CMOS, the SoC integrates a spike-recording front-end with input noise voltage of 3.42μV_rms (0.5Hz-50kHz), microstimulating back-end for delivering charge-balanced monophasic or asymmetric biphasic current pulses up to ~100μA with passive discharge, and nW-level digital signal processing (DSP) unit for real-time SAR based on template subtraction. The 3.1 × 3.1-mm² SoC has been characterized in benchtop tests and neurobiological experiments in isolated buccal ganglia of an Aplysia catifornica (a marine sea slug). The SoC can successfully remove large stimulus artifacts from the contaminated neural data in real time and recover extracellular neural spikes that occur on the tail end of the artifacts. The root-mean-square (rms) value of the pre-processed stimulus artifact is reduced on average by a factor of ~24 post-processing.