DocumentCode
142096
Title
Atomic model learning: A machine learning paradigm for post silicon debug of RF/analog circuits
Author
Deyati, Sabyasachi ; Muldrey, Barry John ; Banerjee, Adrish ; Chatterjee, Avhishek
Author_Institution
Electr. & Comput. Eng., Georgia Inst. of Technol., Atlanta, GA, USA
fYear
2014
fDate
13-17 April 2014
Firstpage
1
Lastpage
6
Abstract
As RF design scales to the 28nm technology node and beyond, pre-silicon simulation and verification of complex mixed-signal/RF SoCs is becoming intractable due to the difficulties associated with simulating diverse electrical effects and design bugs. As a consequence, there is increasing pressure to develop comprehensive post-silicon test and debug tools that can be used to identify design bugs and improve modeling of complex electrical nonidealities observed in silicon. Often, it is not known a-priori what these bugs are and how they can be modeled, significantly complicating the debug process. In this research, a new atomic model learning approach is proposed that uses supervised learning techniques to diagnose design bugs and learn unknown module-level behaviors. Nonideality modeling artifacts called model atoms are inserted into different nodes of the design signal flow paths to learn unknown behaviors along those paths. Under the assumption that the design bug is localized, it is shown that the source of the bug can be identified with high resolution even when the nature of the bug is unknown. The method has been applied to a conventional wireless as well as a polar radio transmitter and key results that demonstrate usefulness and feasibility of the proposed approach are presented.
Keywords
analogue integrated circuits; electronic engineering computing; integrated circuit design; integrated circuit modelling; learning (artificial intelligence); radiofrequency integrated circuits; RF SoC; RF circuits; analog circuits; atomic model learning; design bug diagnosis; machine learning paradigm; mixed-signal SoC; module level behavior; post silicon debug; supervised learning; Integrated circuit modeling; Mathematical model; Mixers; Radio frequency; Radio transmitters; Silicon; Tuning; Artificial neural networks; Fault diagnosis; Mixers; Model checking; Power amplifiers; Preamplifiers; Radio transmitters;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Test Symposium (VTS), 2014 IEEE 32nd
Conference_Location
Napa, CA
Type
conf
DOI
10.1109/VTS.2014.6818791
Filename
6818791
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