DocumentCode :
142099
Title :
Active defense against counterfeiting attacks through robust antifuse-based on-chip locks
Author :
Basak, Abhishek ; Yu Zheng ; Bhunia, Swarup
Author_Institution :
Dept. of EECS, Case Western Reserve Univ., Cleveland, OH, USA
fYear :
2014
fDate :
13-17 April 2014
Firstpage :
1
Lastpage :
6
Abstract :
The rapidly rising incidences of counterfeit Integrated Circuits (ICs) in the semiconductor supply chain pose a significant threat to the electronic industry. These ICs may suffer from functional, performance or reliability issues and can affect design houses, chip manufacturers, system designers as well as end users. The standard chip/package/system level tests are often inadequate in detecting various forms of counterfeit ICs. On the other hand, design approaches that enable IC authentication are often not attractive due to significant design effort, hardware overhead and test cost. In this paper, we propose a novel defense against counterfeiting attacks through a “chip locking approach”, where an IC is made non-operational by locking select pins through insertion of Antifuse (AF) devices in input/output circuitry. It can be unlocked through application of a hard-to-clone key. The key is internally stored in a onetime programmable non-volatile memory. The key storage and comparison circuit is protected against reverse engineering and side-channel analysis attacks. Through mathematical analysis and simulation results, we demonstrate that the proposed mechanism provides high level of protection against all major forms of counterfeiting attacks (reselling, remarking and cloning) at ultralow overhead (<; 0.01% area).
Keywords :
integrated circuit manufacture; integrated circuit reliability; IC authentication; active defense; antifuse devices; antifuse-based on-chip locks; chip locking approach; chip manufacturers; comparison circuit; counterfeit integrated circuits; counterfeiting attacks; design houses; electronic industry; end users; hard-to-clone key; hardware overhead; input/output circuitry; key storage; mathematical analysis; one time programmable nonvolatile memory; reliability issues; reverse engineering; semiconductor supply chain; side-channel analysis attacks; standard chip/package/system level tests; system designers; test cost; Cloning; Counterfeiting; Hardware; Integrated circuits; Logic gates; Pins; Programming;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Test Symposium (VTS), 2014 IEEE 32nd
Conference_Location :
Napa, CA
Type :
conf
DOI :
10.1109/VTS.2014.6818793
Filename :
6818793
Link To Document :
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