DocumentCode
142100
Title
Auto-identification of positive feedback loops in multi-state vulnerable circuits
Author
Zhiqiang Liu ; You Li ; Geiger, Randall L. ; Degang Chen
Author_Institution
Dept. of Electr. & Comput. Eng., Iowa State Univ., Ames, IA, USA
fYear
2014
fDate
13-17 April 2014
Firstpage
1
Lastpage
5
Abstract
A systematic method is proposed for automatically identifying positive feedback loops (PFLs) in analog/mixed-signal circuits. The method first converts the netlist of a circuit into a directed dependency graph (DDG) which captures the critical relationships among branch currents and node voltages. It then utilizes graph theory techniques to find all feedback loops from the DDG and finally, criterion are developed to determine the PFLs. Since multiple states is caused by the PFLs, this method could identify the circuit´s vulnerability to undesigned operating points only by its structure without the computation of DC solutions. The proposed approach is implemented in program and simulation results show it could identify all the PFLs very robustly.
Keywords
analogue integrated circuits; circuit feedback; directed graphs; mixed analogue-digital integrated circuits; analog circuits; automatic identification; directed dependency graph; graph theory techniques; mixed signal circuits; multistate vulnerable circuits; positive feedback loops; Feedback loop; Logic gates; MOSFET; Photonic band gap; Pins; Voltage control; multiple operating points; multiple states; netlist; positive feedback loops; topological structure;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Test Symposium (VTS), 2014 IEEE 32nd
Conference_Location
Napa, CA
Type
conf
DOI
10.1109/VTS.2014.6818794
Filename
6818794
Link To Document