• DocumentCode
    1421985
  • Title

    Compression flow modeling of underfill encapsulants for low cost flip-chip assembly

  • Author

    Pascarella, Nathan W. ; Baldwin, Daniel F.

  • Author_Institution
    GenRad Inc., Westford, MA 01886-0033 USA
  • Volume
    21
  • Issue
    4
  • fYear
    1998
  • Firstpage
    325
  • Lastpage
    335
  • Abstract
    Flip-chip technology represents a rapidly advancing area in commercial electronics. Flip-chip on board (FCOB) technology also called direct chip attach (DCA) involves the direct interconnection of integrated circuits to low cost organic substrates. In order to ensure adequate reliability, these flip-chip assemblies undergo an underfill encapsulation process in which a polymer material is placed between the chip and the substrate. Conventional underfill processing is achieved through chip site to chip site dispensing and underfill flow via capillary action, making it a costly and time consuming process particularly as device sizes increase and standoff gaps decrease. Extensive cost modeling of conventional flip-chip process technology has shown underfill processing, cleaning, and electroplating solder bumps and substrates to be the major cost driving factors. As part of the Low Cost Next Generation Flip-Chip Processing Program, an advanced flip-chip assembly process is being developed. This process eliminates the need for time consuming capillary flow processing using a compression flow technique where the underfill is applied prior to chip placement. The innovative process integrates the chip placement and polymer underfill processes using a compression or squeeze flow technique. It results in significantly lower assembly costs and reduced cycle time. In general, the compression flow of the underfill material governs assembly yield and reliability. This paper focuses on flow simulation studies of the compression flow chip placement process. It represents a fundamental advancement in compression flow simulation of polymers in its successful application to the complex geometries and surface topologies demanded by miniaturized flip-chip assembly. Here a simulation methodology is developed and simulation studies are conducted to characterize the compression flow of the underfill, estimate required chip placement forces, evaluate the effect of underfill geometry, and as- ess the potential formation of voids. Results yield design guidelines that give insight into process parameters such as the limits on underfill deposition geometry and underfill viscosity, and provided an initial process window.
  • Keywords
    Assembly; Flip-chip devices; Force; Geometry; Polymers; Substrates; Viscosity; DCA; FCOB;
  • fLanguage
    English
  • Journal_Title
    Components, Packaging, and Manufacturing Technology, Part C, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1083-4400
  • Type

    jour

  • DOI
    10.1109/TCPMC.1998.7102531
  • Filename
    7102531