Title :
Processing architectures for smart pixel systems
Author :
Wills, D. Scott ; Baker, James M., Jr. ; Cat, Huy H. ; Chai, Sek M. ; Codrescu, Lucian ; Cruz-Rivera, José ; Eble, John C. ; Gentile, Antonio ; Hopper, Michael A. ; Lacy, W. Stephen ; Lôpez-Lagunas, Abelardo ; May, Phil ; Smith, Scott ; Taha, Tarek
Author_Institution :
Packaging Res. Center, Georgia Inst. of Technol., Atlanta, GA, USA
fDate :
4/1/1996 12:00:00 AM
Abstract :
Smart pixel architectures offer important new opportunities for low-cost, portable image processing systems. They provide greater I/O bandwidth and computing performance than systems based on CCD and microprocessors. However, finding a balance between performance, flexibility, efficiency, and cost depends on an evaluation of target applications. This paper describes several promising architectural approaches for the realization of videoputer systems and outlines example implementations being pursued at the Georgia Institute of Technology
Keywords :
image processing equipment; integrated optoelectronics; parallel architectures; smart pixels; systolic arrays; video signal processing; Georgia Institute of Technology; I/O bandwidth; SIMD architectures; computing performance; low-cost portable image processing systems; message passing MIMD architectures; processing architectures; smart pixel systems; systolic arrays; videoputer systems; Application software; Bandwidth; Cameras; Computer architecture; Costs; Image processing; Microprocessors; Smart pixels; Telecommunication computing; Video compression;
Journal_Title :
Selected Topics in Quantum Electronics, IEEE Journal of
DOI :
10.1109/2944.541872
