Routability improvement using dynamic interconnect architecture

We present a dynamic architecture for field programmable gate array (FPGA)-based computing systems with the introduction of dynamic field-programmable interconnection devices. The central principle of this new architecture is based on the concept of time-sharing, which we use to efficiently exploit the potential communication bandwidth of interconnection resources. This new architecture not only releases FPGA pin limitation to some degree, but also greatly increases the routability of interconnection networks, resulting in higher overall performance of FPGA-based systems.