DocumentCode
1423099
Title
Advanced soft-reliability information-based post-viterbi processor
Author
Lee, Jun ; Immink, Kees A Schouhamer
Author_Institution
Data & Storage R &D Lab, LG Electron., Seoul, South Korea
Volume
57
Issue
4
fYear
2011
fDate
11/1/2011 12:00:00 AM
Firstpage
1586
Lastpage
1591
Abstract
This paper proposes a new soft-reliability information-based post-Viterbi processor with advanced noise-robustness for reducing probability of miss-correction and no correction of a conventional soft-reliability-based post-Viterbi processor. Among all likely error starting positions for prescribed error events, the two schemes are equal to attempt to correct error-type corresponding to a position with minimum one only if there exist positions where a soft-reliability estimate is negative. The main difference between the two schemes is how they acquire the softreliability estimate. The soft-reliability estimate of the new scheme is obtained through the elimination of the noisesensitive component from the log-likelihood ratio of the posteriori probabilities, which is the soft-reliability estimate of conventional scheme. As a result, the new scheme is based on more reliable soft-reliability information so reducing the probability of miss-correction and no correction.
Keywords
Viterbi decoding; error correction codes; error detection codes; interference suppression; maximum likelihood estimation; reliability; a posteriori probability; error correction coding; error detection code; log likelihood ratio; noise elimination; post-Viterbi processor; soft reliability estimation; AWGN; Correlation; Detectors; Error correction; Error correction codes; Reliability; Error detection code; cyclicredundancy check code.; dominant error event; soft-reliability information-based post-Viterbi processor;
fLanguage
English
Journal_Title
Consumer Electronics, IEEE Transactions on
Publisher
ieee
ISSN
0098-3063
Type
jour
DOI
10.1109/TCE.2011.6131129
Filename
6131129
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