An approach for fabricating high-performance inductors on low-resistivity substrates

Author

Xie, Ya-Hong ; Frei, Michel R. ; Becker, Andrew J. ; King, Clifford A. ; Kossives, D. ; Gomez, L.T. ; Theiss, S.K.

Author_Institution

Lucent Technol., AT&T Bell Labs., Murray Hill, NJ, USA

Volume

33

Issue

9

fYear

1998

fDate

9/1/1998 12:00:00 AM

Firstpage

1433

Lastpage

1438

Abstract

Porous Si layers up to 250 μm in thickness are used to isolate spiral inductors from low resistivity substrates. Wafer curvature and secondary ion mass spectroscopy (SIMS) analysis are done to address the manufacturability issue of porous Si. Spiral inductors with a single level Al on 2 in, p-type substrates of 0.008 Ω-cm resistivity are demonstrated with Q<6 at 3 GHz for an L of ~8 nH. Large inductors with L~100 nH have been shown with the first resonance frequency at 1 GHz. The expected performance potential as well as factors that could be limiting the Q are discussed

Keywords

CMOS integrated circuits; Q-factor; UHF integrated circuits; inductors; integrated circuit technology; mixed analogue-digital integrated circuits; porous materials; secondary ion mass spectra; silicon; substrates; 0.008 ohmcm; 250 micron; 3 GHz; Al-Si; Q-factor limitation; RFIC; SIMS analysis; Si; digital/RF circuits; high-performance inductors; inductor fabrication; low-resistivity substrates; p-type substrates; porous Si layers; secondary ion mass spectroscopy; single level Al; spiral inductor isolation; wafer curvature analysis; CMOS technology; Conductivity; Etching; Inductors; Mass spectroscopy; Radio frequency; Spirals; Stress; Substrates; Very large scale integration;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/4.711344

Filename

711344