DocumentCode :
1423410
Title :
New Ti-SALICIDE process using Sb and Ge preamorphization for sub-0.2 μm CMOS technology
Author :
Xu, Qiuxia ; Hu, Chenming
Author_Institution :
R&D Center of Microelectron., Acad. Sinica, Beijing, China
Volume :
45
Issue :
9
fYear :
1998
fDate :
9/1/1998 12:00:00 AM
Firstpage :
2002
Lastpage :
2009
Abstract :
A new process for thin titanium self-aligned silicide (Ti-SALICIDE) on narrow n+ poly-Si lines and n+ diffusion layers using preamorphization implantation (PAI) with heavy ions of antimony (Sb) and germanium (Ge) has been demonstrated for application to 0.2-μm CMOS devices and beyond. Preamorphization enhances the phase transformation from C49TixSi x to C54TiSi2 and lowers the transformation temperature by 80°C so that it occurs before conglomeration in narrow lines. Preamorphization by Sb and Ge implantation yields better results than that by As. The sheet resistance of TiSi2 on heavily As doped poly-Si lines are 3.7 Ω/□ and 3.8 Ω/□ for the samples preamorphized by Ge and Sb implantations even with line width down to 0.2 μm. There is less leakage in the Ti-SALICIDE diode with preamorphization than without it. The probable reasons and mechanisms are discussed
Keywords :
CMOS integrated circuits; amorphisation; integrated circuit metallisation; ion implantation; titanium compounds; 0.2 micron; CMOS technology; Ge; Sb; Ti SALICIDE process; TiSi2-Si:As; heavily As doped n+ polysilicon line; junction leakage; n+ diffusion layer; phase transformation temperature; preamorphization implantation; sheet resistance; titanium self-aligned silicide; CMOS logic circuits; CMOS process; CMOS technology; Conductivity; Ion implantation; Proposals; Semiconductor devices; Silicidation; Silicides; Temperature;
fLanguage :
English
Journal_Title :
Electron Devices, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9383
Type :
jour
DOI :
10.1109/16.711367
Filename :
711367
Link To Document :
بازگشت