A Nonlinear Lattice for High-Amplitude Picosecond Pulse Generation in CMOS

In this paper, we study an electrical nonlinear medium consisting of voltage-dependent capacitors and inductors to generate sharp pulses from a lower frequency sinusoid. First, we analyze the optimum conditions for maximum harmonic generation in a uniform nonlinear line. Next, we extend the nonlinear line to a two-dimensional nonlinear lattice that is compatible with CMOS technology. Compared with the nonlinear line, the lattice relies on spatial power combining, higher cut-off frequency, and nonlinear wave interaction to enhance the pulse amplitude and sharpness. To show the feasibility of this method, we implement the first CMOS nonlinear lattice in a 0.13-μm CMOS process, and successfully demonstrate 2.7-V_pp, 6.3-ps pulses from a 22-GHz input signal.