A VLSI implementation of dual AC-3 and MPEG-2 audio decoder

Author

Ko, Woo-Suk ; Yoo, Sun-Kook ; Park, Sung-Wook ; Kim, Joon-Seok ; Youn, Dae-Hee

Author_Institution

Dept. of Electron. Eng., Yonsei Univ., Seoul, South Korea

Volume

44

Issue

3

fYear

1998

fDate

8/1/1998 12:00:00 AM

Firstpage

872

Lastpage

877

Abstract

This paper presents a dual AC-3 and MPEG-2 audio decoder which can decode both bit-streams. MPEG-2 synthesis filtering is modified by the 32-point FFT to share the common data path with the AC-3´s. The architecture of the decoder consists of a programmable DSP core and a hardwired common synthesis filter. The DSP core was designed suitable for audio processing. The common filter design adopts the suggested MPEG-2 modified synthesis filtering. The proposed system was synthesized with 0.6 μm technology and proven to be cost-effective

Keywords

VLSI; audio signals; decoding; digital filters; digital signal processing chips; fast Fourier transforms; 0.6 micron; AC-3 audio decoder; FFT; MPEG-2 audio decoder; MPEG-2 synthesis filtering; VLSI implementation; architecture; audio processing; bit-streams; common data path; filter design; hardwired common synthesis filter; programmable DSP core; Algorithm design and analysis; Decoding; Digital signal processing; Filtering algorithms; Filters; Hardware; Logic design; Partitioning algorithms; Read only memory; Very large scale integration;

fLanguage

English

Journal_Title

Consumer Electronics, IEEE Transactions on

Publisher

ieee

ISSN

0098-3063

Type

jour

DOI

10.1109/30.713207

Filename

713207