DocumentCode :
1425236
Title :
Short-timescale thermal mapping of semiconductor devices
Author :
Ju, Y.S. ; Käding, O.W. ; Leung, Y.K. ; Wong, S.S. ; Goodson, K.E.
Author_Institution :
Dept. of Mech. Eng., Stanford Univ., CA, USA
Volume :
18
Issue :
5
fYear :
1997
fDate :
5/1/1997 12:00:00 AM
Firstpage :
169
Lastpage :
171
Abstract :
We report spatial mapping of temperature fields in semiconductor devices with sub-microsecond temporal resolution. The measurements are performed at a facility that integrates scanning laser-reflectance thermometry with electrical stressing capability. Data for SOI LDMOS transistors investigate transient heat diffusion within the buried silicon dioxide and capture large temperature gradients in the drift region, which result from the spatially-varying impurity concentration. The new thermometry facility is promising for the study of transistor and interconnect thermal failure due to electrostatic discharge (ESD).
Keywords :
MOSFET; buried layers; silicon-on-insulator; temperature distribution; SOI LDMOS transistor; SiO/sub 2/; buried silicon dioxide; drift region; electrical stressing; electrostatic discharge; impurity concentration; interconnect thermal failure; scanning laser-reflectance thermometry; semiconductor device; spatial distribution; submicrosecond temporal resolution; temperature field; thermal mapping; transient heat diffusion; Electric variables measurement; Electrostatic discharge; Performance evaluation; Semiconductor devices; Semiconductor impurities; Semiconductor lasers; Silicon compounds; Spatial resolution; Stress measurement; Temperature;
fLanguage :
English
Journal_Title :
Electron Device Letters, IEEE
Publisher :
ieee
ISSN :
0741-3106
Type :
jour
DOI :
10.1109/55.568750
Filename :
568750
Link To Document :
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