Amplifier linearization using a digital predistorter with fast adaptation and low memory requirements

A method is described for linearizing a power amplifier by predistorting its input. It is particularly well suited to baseband implementation with digital signal processor hardware. In comparison with the most powerful previously published predistorter, it requires four orders of magnitude less memory, reduces convergence time by over three orders of magnitude, eliminates reconvergence time following a channel switch, and eliminates the need for a phase shifter in the feedback path. The predistorter structure is described. Its ability to suppress intermodulation products using only a small table is demonstrated. The effect of predistorter nonidealities (especially limited table size) on the power amplifier´s output are analyzed. A fast adaptation algorithm is introduced