Title :
Single-chip 622-Mb/s SDH/SONET framer, digital cross-connect and add/drop multiplexer solution
Author :
Baechtold, Peter H. ; Beakes, Michael P. ; Buchmann, Peter ; Clauberg, Rolf ; Ewen, John F. ; Gilsdorf, John F. ; Hauviller, Philippe ; Herkersdorf, Andreas ; Le Garrec, Jean-Claude ; Lemppenau, Wolfram ; Parker, Ben ; Pearson, Dale J. ; Pereira, Joseph M
Author_Institution :
IBM Res. Div., Zurich, Switzerland
fDate :
1/1/2001 12:00:00 AM
Abstract :
This paper presents a single-chip all-CMOS solution for 4×OC-3c, OC-12, and OC-12c synchronous digital hierarchy/synchronous optical network (SDH/SONET) framing with integrated serial line interfaces. Outstanding features of this chip are clock and data recovery and fulfillment of ITU-T and Bellcore jitter requirements for SDH/SONET systems, as well as the large range of functions offered. These functions include asynchronous transfer mode (ATM) and point-to-point protocol (PPP) support, as well as built-in native SDH/SONET functions such as digital cross-connect, add/drop multiplexing, and automatic protection switching. In addition, the chip is based on a new scalable modular architecture
Keywords :
CMOS digital integrated circuits; SONET; asynchronous transfer mode; jitter; synchronisation; synchronous digital hierarchy; 622 Mbit/s; Bellcore jitter; CMOS single chip; ITU-T jitter; SDH/SONET framer; add/drop multiplexer; asynchronous transfer mode; automatic protection switching; clock recovery; data recovery; digital cross-connect; point-to-point protocol; scalable modular architecture; serial line interface; Add-drop multiplexers; Asynchronous transfer mode; CMOS technology; Clocks; Cost function; Jitter; Protection switching; Protocols; SONET; Synchronous digital hierarchy;
Journal_Title :
Solid-State Circuits, IEEE Journal of
