A 1.8-GHz low-phase-noise CMOS VCO using optimized hollow spiral inductors

Author

Craninckx, Jan ; Steyaert, Michiel S J

Author_Institution

ESAT, Katholieke Univ., Leuven, Heverlee, Belgium

Volume

32

Issue

5

fYear

1997

fDate

5/1/1997 12:00:00 AM

Firstpage

736

Lastpage

744

Abstract

A completely integrated 1.8-GHz low-phase-noise voltage-controlled oscillator (VCO) has been realized in a standard silicon digital CMOS process. The design relies heavily on the integrated spiral inductors which have been realized with only two metal layers and without etching. The effects of high-frequency magnetic fields and losses in the heavily doped substrate have been simulated and modeled with finite-element analysis. The achieved phase noise is as low as -116 dBc/Hz at an offset frequency of 600 kHz, at a power consumption of only 6 mW. The VCO is tuned with standard available junction capacitances, resulting in a 250-MHz tuning range

Keywords

CMOS analogue integrated circuits; UHF integrated circuits; UHF oscillators; circuit tuning; finite element analysis; inductors; integrated circuit design; integrated circuit modelling; integrated circuit noise; losses; phase noise; silicon; variable-frequency oscillators; voltage-controlled oscillators; 1.8 GHz; 6 mW; Si; UHF; digital CMOS process; finite-element analysis; heavily doped substrate; high-frequency magnetic fields; junction capacitances; losses; low-phase-noise CMOS VCO; optimized hollow spiral inductors; phase noise; tuning range; voltage-controlled oscillator; Analytical models; CMOS process; Etching; Inductors; Magnetic losses; Process design; Semiconductor device modeling; Silicon; Spirals; Voltage-controlled oscillators;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/4.568844

Filename

568844