Origins of Performance Enhancement in Independent Double-Gated Poly-Si Nanowire Devices

Author

Hsu, Hsing-Hui ; Lin, Horng-Chih ; Huang, Tiao-Yuan

Author_Institution

Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan

Volume

57

Issue

4

fYear

2010

fDate

4/1/2010 12:00:00 AM

Firstpage

905

Lastpage

912

Abstract

In this paper, we characterize and compare the characteristics of a poly-Si nanowire (NW) device with independent double-gated configuration under different operation modes. In the device, the tiny NW channels are surrounded by an inverted-T-shaped gate and a top gate. It is found that the device under double-gate (DG) mode exhibits significantly better performance with respect to the two single-gate (SG) modes, as indicated by a higher current drive than the combined sum of the two SG modes and a smaller subthreshold swing of less than 100 mV/dec. Origins of such improvement have been identified to be due to the elimination of the back-gate effect as well as an enhancement in the effective mobility with the DG operation.

Keywords

nanowires; silicon; thin film transistors; device performance enhancement; independent double-gated poly-Si nanowire devices; inverted-T-shaped gate; single-gate modes; thin-film transistor; top gate; Controllability; Etching; FETs; Fabrication; Lithography; Nanoelectronics; Nanoscale devices; Nonvolatile memory; Thin film transistors; Threshold voltage; Double gate (DG); mobility; nanowire (NW); poly-Si; thin-film transistor (TFT);

fLanguage

English

Journal_Title

Electron Devices, IEEE Transactions on

Publisher

ieee

ISSN

0018-9383

Type

jour

DOI

10.1109/TED.2010.2041857

Filename

5422719