DocumentCode
1430063
Title
Programmable modulo-K counters
Author
Lutz, David R. ; Jayasimha, D.N.
Author_Institution
Bell Lab., Columbus, OH, USA
Volume
43
Issue
11
fYear
1996
fDate
11/1/1996 12:00:00 AM
Firstpage
939
Lastpage
941
Abstract
A modulo-k counter or frequency divider is a binary counter that provides an output pulse for every k clock pulses. We describe a modulo-k counter that is programmable and synchronous, with an implementation that is regular and well suited for VLSI. The period of the counter is equal to the delay of a half-adder, a 3-input AND gate, and a latch, independent of the size of the counter. This is just as fast as one proposed by Ercegovac and Lang (1989), but it has a simpler design, uses less area, and is more flexible in that it is easier to change the modulus
Keywords
VLSI; adders; counting circuits; frequency dividers; VLSI; area; binary counter; frequency divider; half-adder; output pulse; programmable modulo-K counters; synchronous counter; Adders; Clocks; Counting circuits; Delay; Frequency conversion; Hardware; Information science; Latches; Pulse circuits; Very large scale integration;
fLanguage
English
Journal_Title
Circuits and Systems I: Fundamental Theory and Applications, IEEE Transactions on
Publisher
ieee
ISSN
1057-7122
Type
jour
DOI
10.1109/81.542285
Filename
542285
Link To Document