Low phase noise LC VCO with reduced drain current duty cycle

Author

Liu, Peng ; Upadhyaya, Parag ; Jung, J. ; Heo, Deukhyoun ; Kim, Jung-Ho ; Kim, Byung-Sung

Author_Institution

Sch. of Electr. Eng. & Comput. Sci., Washington State Univ., Pullman, WA, USA

Volume

48

Issue

2

fYear

2012

Firstpage

77

Lastpage

78

Abstract

A novel LC VCO topology with switched current source is presented. Theoretical analysis is given to show the reduction of cross-paired transistors´ drain current duty cycle with the implementation of current source switching, which reduces the upconversion of 1/f noise and also provides noise shaping by directly reducing 1/f noise. A 5.25´5.5 GHz LC VCO has been fabricated and measured for the proposed topology, achieving a FOM of ´191 dBc/Hz, which is among the best published FOM results for 5´6 GHz VCOs in standard CMOS process.

Keywords

1/f noise; CMOS integrated circuits; constant current sources; low-power electronics; phase noise; voltage-controlled oscillators; 1/f noise; FOM; LC VCO topology; cross-paired transistors drain current duty cycle; current source switching; frequency 5.52 GHz to 5.5 GHz; low phase noise LC VCO; noise shaping; reduced drain current duty cycle; standard CMOS process; switched current source; theoretical analysis;

fLanguage

English

Journal_Title

Electronics Letters

Publisher

iet

ISSN

0013-5194

Type

jour

DOI

10.1049/el.2011.3189

Filename

6138353