Title :
A Virtual Metrology System for Predicting End-of-Line Electrical Properties Using a MANCOVA Model With Tools Clustering
Author :
Pan, Tian-Hong ; Sheng, Bi-Qi ; Wong, David Shan-Hill ; Jang, Shi-Shang
Author_Institution :
Sch. of Electr. & Inf. Eng., Jiangsu Univ., Zhenjiang, China
fDate :
5/1/2011 12:00:00 AM
Abstract :
The ability to predict end-of-line electrical properties of wafer in semiconductor manufacturing processes is critical to developing and maintaining a high yield. However, this is difficult because an advanced wafer manufacturing process consists of 300-400 steps, and in-line metrology data is only available for a few steps and for infrequently sampled wafers. Although a large amount of equipment sensor outputs are readily available for most wafers, most of the sensor variables may not be related to the end-of-line properties. Further, differences in end-of-line properties of wafers processed by tools of the same stage do not imply differences in the values of sensor variables between these tools. Thus, it is important to develop a reliable screening and model building procedure to construct a robust virtual metrology model with good generalization capability. Despite its simplicity, this approach is found to have significantly better generalization capability than nonlinear models, as well as substantial improvement in modeling and prediction capabilities of linear models that use only in-line metrology. The proposed method is also evaluated by an industrial application in a local fabrication unit.
Keywords :
measurement systems; semiconductor device manufacture; MANCOVA model; end-of-line electrical property prediction; generalization capability; in-line metrology data; local fabrication unit; semiconductor manufacturing process; tools clustering; virtual metrology system; wafer manufacturing process; Analysis of variance; Buildings; Indexes; Manufacturing; Metrology; Principal component analysis; Semiconductor device modeling; MANCOVA; principal component analysis; semiconductor manufacturing; virtual metrology; wafer acceptance test;
Journal_Title :
Industrial Informatics, IEEE Transactions on
DOI :
10.1109/TII.2010.2098416