DocumentCode
1430451
Title
Use of sample-and-hold delay circuits for synthesis of raised-cosine filters
Author
Andrews, R.S. ; Constantinides, A.G. ; Turner, L.F.
Author_Institution
Imperial College of Science & Technology, Department of Electrical Engineering, London, UK
Volume
121
Issue
3
fYear
1974
fDate
3/1/1974 12:00:00 AM
Firstpage
169
Lastpage
172
Abstract
A new technique is described in which f.e.t. sample-and-hold delay circuits are used to shape a square-wave digital pulse into a pulse whose spectrum approximates to a raised-cosine spectrum with 100% roll off. The technique, which is entirely digital, is examined both theoretically and experimentally, and it is found that the raised-cosine spectrum can be synthetised simply, and to a high degree of accuracy. The technique is easier to implement than methods based on conventional network synthesis.
Keywords
delay circuits; digital filters; network synthesis; pulse shaping circuits; digital technique; raised cosine filter synthesis; sample and hold delay circuits;
fLanguage
English
Journal_Title
Electrical Engineers, Proceedings of the Institution of
Publisher
iet
ISSN
0020-3270
Type
jour
DOI
10.1049/piee.1974.0030
Filename
5251119
Link To Document