DocumentCode :
1430624
Title :
A low power video-rate pyramid VQ decoder
Author :
Tsern, Ely K. ; Meng, Teresa H.
Author_Institution :
Center for Integrated Syst., Stanford Univ., CA, USA
Volume :
31
Issue :
11
fYear :
1996
fDate :
11/1/1996 12:00:00 AM
Firstpage :
1789
Lastpage :
1794
Abstract :
This paper describes a pyramid vector quantization (VQ) decoder chip used for real-time video decompression. The chip is designed for portable applications with very low power requirements, operating at a 1.35 V supply and consuming 6.7 mW with a 6.4 MHz clock, sufficient to decode 1.27 Mpixels/s for a color display of 176 pixels wide, 240 lines, at 30 frames per second. The chip performs decompression by converting pyramid vector quantization codewords into data values and integrates all functionality on a single die, requiring no external hardware support or memory
Keywords :
CMOS digital integrated circuits; decoding; integrated circuit design; real-time systems; vector quantisation; video signal processing; 1.35 V; 6.4 MHz; 6.7 mW; color display; data values; low power requirements; real-time video decompression; single die functionality; vector quantization; video-rate pyramid VQ decoder; Bit error rate; Clocks; Decoding; Displays; Encoding; Hardware; Image coding; Laplace equations; Throughput; Transform coding; Vector quantization; Video compression;
fLanguage :
English
Journal_Title :
Solid-State Circuits, IEEE Journal of
Publisher :
ieee
ISSN :
0018-9200
Type :
jour
DOI :
10.1109/JSSC.1996.542324
Filename :
542324
Link To Document :
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