A PRML read/write channel IC using analog signal processing for 200 Mb/s HDD

Author

Parsi, Kaveh ; Burns, Robert P. ; Chaiken, Alan ; Chambers, Mark J. ; Forni, William R. ; Harnishfeger, David ; Kaylor, Scott ; Pennell, Micheal J. ; Perez, Jose O. ; Rao, Narendra ; Rohrbaugh, Mark ; Ross, Milk ; Stuhlmiller, Gary L.

Author_Institution

Motorola Inc., Tempe, AZ, USA

Volume

31

Issue

11

fYear

1996

fDate

11/1/1996 12:00:00 AM

Firstpage

1817

Lastpage

1830

Abstract

A PR4 read/write IC operating at 50-200 Mb/s while consuming 0.85 W is implemented in 0.5 μm BiCMOS technology. The device integrates all of the read/write functions and, in addition, provides a servo demodulator and power management in a single 64-pin TQFP package. PR4 equalization is achieved via a continuous time filter and a 7-tap continuous time transversal equalizer using signed-signed least mean square adaptation

Keywords

BiCMOS analogue integrated circuits; analogue processing circuits; hard discs; maximum likelihood detection; partial response channels; 0.5 micron; 0.85 W; 50 to 200 Mbit/s; BiCMOS technology; HDD; PR4 equalization; PRML read/write channel IC; TQFP package; analog signal processing; continuous time filter; continuous time transversal equalizer; power management; servo demodulator; signed-signed least mean square adaptation; Analog integrated circuits; BiCMOS integrated circuits; Decoding; Demodulation; Detectors; Energy consumption; Energy management; Equalizers; Finite impulse response filter; Low pass filters; Maximum likelihood detection; Packaging; Servomechanisms; Signal processing; Transversal filters; Viterbi algorithm;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/JSSC.1996.542407

Filename

542407