DocumentCode
1432185
Title
Use of exclusive-OR gates for boolean minimisation
Author
Miessler, M.H.
Author_Institution
IBM UK Laboratories Ltd., Processor Systems Department, Winchester, UK
Volume
119
Issue
9
fYear
1972
fDate
9/1/1972 12:00:00 AM
Firstpage
1269
Lastpage
1272
Abstract
An algorithm for the minimisation of logic functions using XOR (exclusive-OR) gates in addition to AND, OR and INVERT gates is presented. It applies to functions with inherent symmetries, and the saving of hardware compared with that achieved by other minimisation methods is typically 40¿60%. The algorithm could be included in the minimisation part of an automated-logic design program, or used as a logic designer´s tool, either in the form of an on-call program or in the form of two templates for quick manual application.
Keywords
Boolean functions; computer-aided logic design; minimisation of switching nets; AND gates; Boolean functions minimisation of switching nets; Boolean minimisation; INVERT gates; XOR gates; computer aided logic design;
fLanguage
English
Journal_Title
Electrical Engineers, Proceedings of the Institution of
Publisher
iet
ISSN
0020-3270
Type
jour
DOI
10.1049/piee.1972.0245
Filename
5251438
Link To Document