Title :
Low-temperature polysilicon TFT with two-layer gate insulator using photo-CVD and APCVD SiO/sub 2/
Author :
Mimura, Akio ; Suzuki, Takashi ; Konishi, Nobutake ; Suzuki, Takaya ; Miyata, Kenji
Author_Institution :
Hitachi Ltd., Ibaraki, Japan
fDate :
6/1/1988 12:00:00 AM
Abstract :
The performance of polysilicon thin-film transistors (TFTs) formed by a 600 degrees C process was improved using a two-layer gate insulator of photochemical-assisted vapor deposition (photo-CVD) SiO/sub 2/ and atmospheric-pressure chemical vapor deposition (APCVD) SiO/sub 2/. The photo-CVD SiO/sub 2/, 100 AA thick, was deposited on polysilicon and followed by APCVD SiO/sub 2/ of 1000 AA thickness. The TFT had a threshold voltage of 8.3 V and a field-effect mobility of 35 cm/sup 2//V-s, which were higher than those of the conventional TFT with a single-layer gate SiO/sub 2/ of APCVD. Hydrogenation by hydrogen plasma was more effective for the new TFT than for the conventional device.<>
Keywords :
chemical vapour deposition; semiconductor technology; silicon compounds; thin film transistors; 100 A; 1000 A; 600 C; 8.3 V; APCVD; SiO/sub 2/ gate insulator; TFT; field-effect mobility; hydrogenation by plasma; low temperature processing; performance; photo-CVD; photochemical-assisted vapor deposition; polycrystalline Si; polysilicon; thin-film transistors; threshold voltage; two-layer gate insulator; Annealing; Chemical vapor deposition; Glass; Insulation; Oxidation; Photochemistry; Substrates; Surface cleaning; Surface treatment; Thin film transistors;
Journal_Title :
Electron Device Letters, IEEE
