DocumentCode
1432737
Title
An Insight Into ESD Behavior of Nanometer-Scale Drain Extended NMOS (DeNMOS) Devices: Part II (Two-Dimensional Study-Biasing & Comparison With NMOS)
Author
Chatterjee, Amitabh ; Shrivastava, Mayank ; Gossner, Harald ; Pendharkar, Sameer ; Brewer, Forrest ; Duvvury, Charvaka
Author_Institution
Dept. of Electr. Eng., Univ. of California, Santa Barbara, CA, USA
Volume
58
Issue
2
fYear
2011
Firstpage
318
Lastpage
326
Abstract
In this paper, we present an analysis of drain extended n-channel metal-oxide-semiconductor (DeNMOS) and study the impact of both substrate and gate biasing on the regenerative avalanche injection phenomenon at the edge of drain contact. We will demonstrate that the flow and distribution of avalanche-generated holes and electrons are significantly impacted by biasing the gate and pumping current through the substrate. Finally, we show that gate bias or drain bias, when individually applied, can only lead to marginal improvement in It2; however, when both the biases are applied simultaneously, it can then optimally improve the failure performance. Subsequently, we compare high current performance of DeNMOS with NMOS or swapped DeNMOS configuration through a simplified 1-D macroscopic model.
Keywords
MOSFET; electrostatic discharge; nanoelectronics; ESD behavior; gate biasing; nanometer-scale drain extended NMOS devices; regenerative avalanche injection phenomenon; substrate; Current density; Electrostatic discharge; Logic gates; MOS devices; Modulation; Space charge; Substrates; Ballast; electrothermal runaway; filamentation; regenerative turn-on; transmission line pulsing;
fLanguage
English
Journal_Title
Electron Devices, IEEE Transactions on
Publisher
ieee
ISSN
0018-9383
Type
jour
DOI
10.1109/TED.2010.2093011
Filename
5697324
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