• DocumentCode
    1433116
  • Title

    Exploiting near symmetry in multilevel logic synthesis

  • Author

    Wang, Feng ; Dietmeyer, Donald L.

  • Author_Institution
    Synopsys Inc., Mountain View, CA, USA
  • Volume
    17
  • Issue
    9
  • fYear
    1998
  • fDate
    9/1/1998 12:00:00 AM
  • Firstpage
    772
  • Lastpage
    781
  • Abstract
    Effective algorithms exist for synthesizing symmetric functions and for “ordinary” nonsymmetric functions. However, the existing methods have difficulties when the functions are not symmetric but are “close” to being symmetric. We formulate a set of operations to decompose a function so that symmetric components can be created and utilized to simplify the function. These operations are collectively called symmetry reexpression, and we present theoretical and practical work for performing such operations. The optimal decomposition has exponential complexities; therefore, we seek algorithms to approximate the optimum. The resulting software package applies to arbitrary multilevel Boolean networks. For experimental functions constructed by taking cubes from otherwise symmetric, multiple-output benchmark functions, symmetry reexpression is beneficial when up to 40% of the cubes are removed
  • Keywords
    Boolean functions; circuit optimisation; logic CAD; multivalued logic circuits; arbitrary multilevel Boolean networks; exponential complexities; multilevel logic synthesis; multiple-output benchmark functions; near symmetry; symmetric components; symmetry reexpression; Application software; Computer science education; Logic functions; Network synthesis; Software packages;
  • fLanguage
    English
  • Journal_Title
    Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0278-0070
  • Type

    jour

  • DOI
    10.1109/43.720314
  • Filename
    720314