Sequence-invariant state machines

Author

Whitaker, Sterling R. ; Manjunath, Shamanna K. ; Maki, Gary K.

Author_Institution

NASA Space Eng. Res. Center for VLSI Design, Idaho Univ., Moscow, ID, USA

Volume

26

Issue

8

fYear

1991

fDate

8/1/1991 12:00:00 AM

Firstpage

1145

Lastpage

1151

Abstract

A synthesis method and an MOS VLSI architecture are presented to realize sequential circuits that have the ability to implement any state machine having N states and m inputs, regardless of the actual sequence specified in the flow table. The design method utilizes binary tree structured logic to implement regular and dense circuits. The desired state sequence can be hardwired with power supply connections or can be dynamically reallocated if stored in a register. This allows programmable VLSI controllers to be designed with a compact size and performance approaching that of dedicated logic. Results of ICV implementations are reported and an example sequence-invariant state machine is contrasted with implementations based on traditional methods

Keywords

MOS integrated circuits; VLSI; integrated logic circuits; logic design; sequential circuits; sequential machines; sequential switching; MOS VLSI architecture; binary tree structured logic; design method; programmable VLSI controllers; sequence-invariant state machine; sequential circuits; synthesis method; Binary trees; Circuit synthesis; Design methodology; Logic circuits; Logic design; Power supplies; Registers; Sequential circuits; Size control; Very large scale integration;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/4.90067

Filename

90067