A custom-designed receiver-stimulator chip for an advanced multiple-channel hearing prosthesis

Author

McDermott, Hugh

Author_Institution

Dept. of Otolaryngology, Melbourne Univ., Parkville, Vic., Australia

Volume

26

Issue

8

fYear

1991

fDate

8/1/1991 12:00:00 AM

Firstpage

1161

Lastpage

1164

Abstract

A receiver-stimulator integrated circuit for an advanced multiple-channel cochlear implant was custom designed and fabricated successfully, using a 3-μm CMOS process with two layers of metal. The chip contains nearly all of the implant electronics, including a data receiver, digital-to-analog converter, three stimulus current generators and timing controllers, 20 output stages, and an outward telemetry subsystem. The measured power consumption of the chip when quiescent, with supply voltage of the receiver stimulator (V_DD) at 12 V and while receiving unmodulated RF carrier, was 6.8 mW. The implant´s total power consumption when stimulating under worst-case conditions (three stimuli being generated at the maximum rate with maximum current levels and durations) was 45 mW

Keywords

CMOS integrated circuits; application specific integrated circuits; biomedical electronics; hearing aids; prosthetics; receivers; 12 V; 3 micron; 6.8 to 45 mW; CMOS process; custom IC; data receiver; implant electronics; integrated circuit; multiple-channel hearing prosthesis; outward telemetry subsystem; power consumption; receiver-stimulator chip; stimulus current generators; timing controllers; CMOS integrated circuits; CMOS process; Cochlear implants; Digital-analog conversion; Energy consumption; Power measurement; Semiconductor device measurement; Telemetry; Timing; Voltage;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/4.90069

Filename

90069